The First International Workshop on
Domain Specific System Architecture (DOSSA-1)

The main theme of this year: Autonomous driving/agent


Fukuoka City, Japan, Oct 21, 2018
http://prism.sejong.ac.kr/dossa-1

CALL FOR PAPERS

In conjunction with the 51st International Symposium on Microarchitecture (MICRO-51)


 



CALL FOR PAPERS

Domain specific systems are an increasingly important computing environment for many people and businesses. As the information technologies emerges into various real world applications such as autonomous driving, IoT (Internet of Things), CPS (Cyber physical systems) and health care applications in the 4th industrial revolution era, interest in the specialized domain specific computing systems are increasing significantly. In addition to the conventional computing platforms, domain specific computing systems have a lot of design challenges including specialized hardware components like hardware accelerator, optimized library and domain specific languages. This workshop focuses on domain specific system design in both hardware and software aspects and their interaction in order to improve the availability and efficiency in the emerging real world applications. The main theme of this workshop in this year is the autonomous driving. Topics of particular interest include, but are not limited to:

Application analysis and workload characterization to design domain specific system for emerging applications, such as autonomous driving, IoT and health care applications.
Domain specific processor/system architectures and hardware features for domain specific systems;
Hardware accelerators for domain specific systems;
Storage architectures for domain specific systems;
Experiences in domain specific system development;
Novel techniques to improve responsiveness by exploiting domain specific systems;
Novel techniques to improve performance/energy for domain specific systems;
Domain specific systems performance evaluation methodologies;
Application benchmarks for domain specific systems;
Enabling technologies for domain specific systems (smart edge devices, smart sensors, energy harvesting, sensor networks, sensor fusion etc.);

The workshop aims at providing a forum for researchers, engineers and students from academia and industry to discuss their latest research in designing domain specific system for various emerging application areas in 4th industrial revolution era to bring their ideas and research problems to the attention of others, and to obtain valuable and instant feedback from fellow researchers. One of the goals of the workshop is to facilitate lively and rigorous–yet friendly–discussion about the research problems in the architecture, implementation, networking, and programming and thus pave the way to novel solutions that improve both hardware and software of future domain specific systems

Invited talk I

- Speaker : Shinpei Kato
- Title : DOM: Domain-Specific SoC Design for Self-Driving Technology
- Bio : Shinpei Kato is founder and director of Tier IV, Inc., and an associate professor at the Graduate School of Information Science and Technology at the University of Tokyo. Previously, Shinpei was an associate professor at the Graduate School of Information Science, Nagoya University, from 2012-2016. He also was a postdoctoral scholar in the School of Science and Technology at Keio University, in the Graduate School of Information Science and Technology, at the University of Tokyo, and in the Department of Computer Science at the University of California, Santa Cruz. He was also a visiting scholar in the Department of Electrical and Computer Engineering at Carnegie Mellon University. Shinpei holds a Ph.D., Master of Science, and Bachelor of Science from Keio University.

Invited talk II

- Speaker : Vijay Janapa Reddi
- Title : Aerial Robotics for Computer Architects
- Abstract : Autonomous computing systems are marching toward ubiquity in everyday life. In recent years, Unmanned Aerial Systems (UAS) have seen an influx of attention, specifically in application areas with a strong demand for autonomy. A key challenge in making mobile robots such as UAS autonomous is their need to operate under power and energy constraints, which severely limit their onboard sensing, intelligence, and endurance capabilities. To overcome these challenges, researchers must understand how endurance, power efficiency, and computational bottlenecks in autonomous systems relate to one another. The talk sheds light on these issues and on the tools and methodologies needed to overcome these issues. The talk also sheds light on recent developments that enable hardware architects to make contributions to this emerging domain. These developments include a closed-loop simulation environment that allows the study of computing onboard UAS, an end-to-end autonomous UAS benchmark application suite, and ongoing work on a RISC-V based SoC platform for driving the adoption of open standards for accelerating research and development in robotics. The topics that the talk touches up apply broadly beyond the scope of autonomous UAS to other agents such as ground service robots that face similar constraints and challenges. Hence, the talk concludes with the key takeaways and helps identify opportunities for tighter collaboration between the robotics and computer architecture fields, and the computing industry at large.
- Bio : Vijay Janapa Reddi is currently a Visting Research Faculty at Google, on leave from his position as an Associate Professor in the Department of Electrical and Computer Engineering at the University of Texas at Austin. Starting in Spring 2019, he will be an Associate Professor at Harvard University. His research interests include computer architecture and software design to enhance mobile robotics and the energy efficiency and reliability of heterogeneous architectures. Dr. Janapa Reddi is a recipient of multiple awards, including the National Academy of Engineering (NAE) Gilbreth Lecturer Honor (2016), IEEE TCCA Young Computer Architect Award (2016), Intel Early Career Award (2013), Google Faculty Research Awards (2012, 2013, 2015, 2017), Best Paper at the 2005 International Symposium on Microarchitecture, Best Paper at the 2009 International Symposium on High Performance Computer Architecture, and IEEE’s Top Picks in Computer Architecture awards (2006, 2010, 2011, 2016, 2017). Beyond his technical research contributions, Dr. Janapa Reddi is passionate about STEM education. He is responsible for the Austin Independent School District’s “hands-on” computer science (HaCS) program, which teaches sixth- and 7th-grade students programming and the general principles that govern a computing system using open-source electronic prototyping platforms. He received a B.S. in computer engineering from Santa Clara University, an M.S. in electrical and computer engineering from the University of Colorado at Boulder, and a Ph.D. in computer science from Harvard University.

ACCEPTED PAPERS

"MLPAT: A Power, Area, Timing Modeling Framework for Machine Learning Accelerators" , Tianqi Tang(University of California, Santa Barbara), Sheng Li(Google), Yuan Xie(University of California, Santa Barbara), Norm Jouppi(Google)
"DnnWeaver v2.0: From Tensors to FPGAs" , Hardik Sharma(Georgia Institute of Technology), Jongse Park(Georgia Institute of Technology), Balavinayagam Samynathan(Bigstream), Behnam Robatmili(Bigstream), Shahrzad Mirkhani(Bigstream), Hadi Esmaeilzadeh(University of California, San Diego)
"Autonomous Flight Sımulation of Unmanned Aerial Vehicles with Deep-Q-Network" , Jitae Yun(Yonsei University), Su-Kyung Yoon(Yonsei University), Shin-Dug Kim(Yonsei University)

SUBMISSION GUIDELINE

Submit a 2-page presentation abstract to a web-based submission system (https://cmt3.research.microsoft.com/DOSSA2018) by August 27, 2018. Notification of acceptance will be sent out by September 1, 2018. Final paper and presentation material (to be posted on the workshop web site) due Oct 8, 2018. For additional information regarding paper submissions, please contact the organizers.

IMPORTANT DATES

Abstract submission : August 27, 2018
Author notification : September 1, 2018
Final camera-ready paper : October 8, 2018
Workshop : October 21, 2018

Workshop Organizers

Hyesoon Kim, Georgia Tech (hyesoon@cc.gatech.edu)
Giho Park, Sejong Univ. (ghpark@sejong.ac.kr)

Program Committee

Abhijit Chatterjee, Georgia Tech (abhijit.chatterjee@ece.gatech.edu)
Hsien-Hsin Lee, TSMC (hhleeq@tsmc.com)
Sungjoo Yoo, Seoul National Univ (sungjoo.yoo@gmail.com)

Web Chair

MinKwan Kee, Sejong Univ. (mkkee@sju.ac.kr)